HomeArtificial IntelligenceMIPS releases RISC-V CPU for autonomous vehicles

MIPS releases RISC-V CPU for autonomous vehicles

MIPS has released its P8700 CPU based on the RISC-V computing architecture for driver assistance and autonomous vehicle applications.

The San Jose, California-based company, which focuses on developing efficient and configurable mental property computing solutions, licenses its designs to other chipmakers. Today marks the overall availability of the MIPS P8700 series RISC-V processor.

Designed to satisfy the needs of recent, low-latency, high-intensity data movement automotive applications comparable to ADAS (Advanced Driver Assistance System) and autonomous vehicles, the P8700 offers accelerated computing power, power efficiency and scalability, MIPS CEO Sameer Wasson said in an interview with VentureBeat.

“Automotive is an enormous segment that we’re specializing in. It continues to be a really exciting place. Some businesses got here and a few businesses disappeared,” Wasson said. “They’ve lost interest. They got here out of COVID and restocked their inventory. But what is going on within the industry immediately may be very interesting. I believe autonomy is now returning to that regular growth rate.”

He added: “It is one in every of the largest driving forces to proceed to innovate to offer higher solutions.” When you consider the solutions today, most deployments in vehicles are driven by previous vehicle technology. They were easy microcontrollers, easy stuff. They could open and shut doors and operate internal combustion engines. As autonomy increases, computing requirements will evolve toward greater AI network computing power. This allows you the next level of autonomy.”

“We have technology and we may also help make it far more mainstream than it has been,” he said.

MIPS has been supplying Mobileye with processors just like the P8700 for years.

Typical ADAS and autonomous driving solutions depend on a brute force approach, embedding higher numbers of cores at higher clock speeds to realize synthetic, albeit unrealistic and unrealized, performance.

The P8700, with its multi-threaded and power-efficient architecture, enables MIPS customers to implement fewer CPU cores and a much lower Thermal Design Power (TDP) than current market solutions, allowing OEMs to develop ADAS solutions in a reasonable and highly scalable manner. Additionally, it alleviates system bottlenecks as a result of inefficiency in data movement by providing a highly efficient, optimized, and fewer performance latency-sensitive solution specifically tailored for interruption-challenged multi-sensor platforms.

“When you take a look at the RISC-V space as an entire, I believe these spaces are poised for disruption and offer the chance for brand spanking new architectures,” Wasson said. “Otherwise, electric vehicles will likely be far more expensive than needed.”

For Level 2 or higher ADAS systems with AI autonomous software stack, the MIPS P8700 also can offload core processing elements that can not be easily quantized in deep learning and reduced by sparsity-based convolution processing capabilities, leading to a discount of greater than 30% Better AI stack results in software usage and efficiency.

“The automotive market demands CPUs that may process large amounts of knowledge from multiple sensors in real time and feed AI accelerators for efficient processing,” said Wasson. “MIPS multithreading and other architectural hooks tailored to automotive applications make it a compelling core for data-intensive processing tasks. This will enable automotive OEMs to have powerful computing systems that use less power and make higher use of AI accelerators.”

The MIPS P8700 core with multi-core/multi-cluster and multi-threaded CPU IP based on RISC-V ISA is now advancing toward volume production at several major OEMs. Major customers comparable to Mobileye (Nasdaq: MBLY) have adopted this approach for future self-driving vehicle and highly automated driving system products.

“MIPS has been a key partner in our success with the EyeQ™ systems-on-chip for ADAS and autonomous vehicles,” Elchanan Rushinek, executive vp of engineering at Mobileye, said in a press release. “The introduction of the MIPS P8700 RISC-V core will help advance our advancement for global automakers, enabling higher performance and excellent cost and power efficiency.”

The P8700 series is a high-performance out-of-order processor that implements the RISC-V RV64GC architecture, including latest CPU and system-level features designed to deal with performance, performance, area form aspects, and extra proven features that based on older MIPS microprocessors. Architecture utilized in greater than 30 automotive models in the worldwide OEM market today.

Mobileye chip for vehicles with P8700 CPU from MIPs.

Designed for industry-leading compute density, MIPS' latest processor leverages three key architectural features, including MIPS out-of-order multithreading, which enables the execution of multiple processes
Instructions from multiple threads (harts) every clock cycle, ensuring higher utilization and CPU efficiency.

It also features coherent multi-core and multi-cluster, with the P8700 series scaling as much as 6 coherent P8700 cores in a cluster, with each cluster supporting direct-attach accelerators.

And it has functional safety that meets the ASIL-B(D) functional safety standard (ISO26262) by integrating multiple fault detection functions comparable to: B. End-to-end parity protection on address and data buses, parity protection on software-visible registers, error bus for reporting faults to the system, and
more.

The MIPS P8700 processor is now available to the broader market, with key partnerships already in place. Deliveries with OEM introductions are expected soon. MIPS has been around for 3 many years and billions of its chips have been shipped thus far.

Wasson said vendors historically used the flawed computing architecture, designed for entertainment and screen applications relatively than hardcore AI problems.

“We’re attempting to deal with constructing computing power for ADAS and better levels of autonomy from the bottom up,” he said.

Vasanth Waran, global head of business development at MIPS, said in an interview with VentureBeat that other architectures drive performance through brute force, adding more complexity and scale, but don't necessarily produce inexpensive designs.

“If you would like to bring it to a bigger market, you would like autonomy to be inexpensive and you would like it to be scalable,” Waran said. “For lack of a greater word, there must be a purer approach and that’s what motivated us. From the bottom up, the 8700 lets you seamlessly move data between different parts of a design. If you take a look at a automotive, you may have numerous sensors with incoming data, in some cases from cameras, radar, LiDAR, and the inputs from these must be processed. It must be transferred to an AI accelerator system. And then that data must make it easier to make decisions.”

MIPS' designs try and offload much of the facility of AI accelerators, whether in pre-processing or post-processing. A general-purpose processor can support latest software, and this AI accelerator software is always changing.

RISC-V has been constructing its ecosystem over the previous few years and is now the fitting size to support applications.

“The other big thing that’s happening is software-defined vehicles. “Our products may be used for a holistic software-defined vehicle architecture,” said Waran. “We are fully focused on autonomous travel.”

Wasson said his company will likely be on the upcoming CES 2025 in January in Las Vegas, where pitching automakers will likely be an enormous task for the corporate.

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